The tunnel barrier engineered charge trap flash (TBE-CTF) non-volatile memory using CRESTED tunneling barrier was fabricated by stacking thin Si3N4 and SiO2 dielectric layers. Moreover, high-k based HfO2 charge trap layer and Al2O3 blocking layer were used for further improvement of the NVM (non-volatile memory) performances. The programming/erasing speed, endurance and data retention of TBE-CTF memory was evaluated.