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ENG
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경북대학교 전자기술연구소
전자기술연구지
A Circuit Extractor using Block Disassembly Technique for Layout Verification
A Circuit Extractor using Block Disassembly Technique for Layout Verification
손영찬(Yeong Chan Son),주리아(Ri A Ju),유상대(Sang Dae Yu)
경북대학교 전자기술연구소
2001.01
전자기술연구지
vol. 22 iss. 1
132-141(10pages)
UCI
I410-ECN-0102-2009-560-005889975
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